{"id":346,"date":"2013-06-30T07:23:09","date_gmt":"2013-06-30T07:23:09","guid":{"rendered":"http:\/\/www.hppi.de\/?page_id=346"},"modified":"2024-12-06T20:16:35","modified_gmt":"2024-12-06T20:16:35","slug":"introduction","status":"publish","type":"page","link":"https:\/\/www.hppi.de\/?page_id=346","title":{"rendered":"Introduction"},"content":{"rendered":"<h2>Company Profile<\/h2>\n<blockquote><p>\nHigh Power Pulse Instruments GmbH (HPPI) is a supplier of ESD measurement equipment based on <a title=\"advanced Transmission Line Pulse (TLP) techniques\" href=\"https:\/\/www.hppi.de\/wp-content\/uploads\/2013\/06\/ARMMS_Nov_2012_High_Current_TLP_Characterisation_An_Effective_Tool_for_the_Development_of_Semiconductor_Devices_and_ESD_Protection_Solutions.pdf\" target=\"_blank\" rel=\"noopener noreferrer\">advanced Transmission Line Pulse (TLP) techniques<\/a>.\n<\/p><\/blockquote>\n<blockquote><p>\nOur products enable the characterization of semiconductor devices and circuits in the pulsed high current and high voltage time domain.\n<\/p><\/blockquote>\n<blockquote><p>\nThe development of our systems has profited largely from the knowledge gained over 20 years in the development of semiconductor devices, integrated high speed and radio frequency circuits and ESD protection solutions for the semiconductor industry.\n<\/p><\/blockquote>\n<blockquote><p>\nOur products combine standard TLP, very fast TLP and Human Metal Model (HMM), Human Body Model (HBM) and Charged-Coupled TLP (CC-TLP) in a single test system to cover most of today&#8217;s ESD and device characterization needs.\n<\/p><\/blockquote>\n<h3>Articles mentioning HPPI:<\/h3>\n<p> [1]  M. Drallmeier, Y. Zhou, and E. Rosenbaum, \u201cOn-Chip Single-Shot Pulse Generator for TDDB Characterization on a Sub-Nanosecond Timescale,\u201d in Proc. IEEE Int. Rel. Phys. Symp., 2024, pp. 8C.4-1\u20138C.4-10.<\/p>\n<p> [2]  S. Huang, S. Parthasarathy, Y. Zhou, J.-J. Hajjar, and E. Rosenbaum, \u201cOn-Chip ESD Protection for Multi-Gbps Automotive Serial IO in a 16-nm FinFET Process,\u201d in ESD\/EOS Symp., 2024.<\/p>\n<p> [3]  S. Huang, S. Parthasarathy, Y. Zhou, J.-J. Hajjar, and E. Rosenbaum, \u201cReduced RC Time Constant High Voltage Tolerant Supply Clamp for ESD Protection in 16nm FinFET Technology,\u201d in IRPS, 2024.<\/p>\n<p> [4]  Y. Zhou and E. Rosenbaum, \u201cAccuracy preserving extensions to a PDK MOSFET model for ESD simulation,\u201d in Proc. EOS\/ESD Symp., 2024.<\/p>\n<p> [5]  M. Drallmeier and E. Rosenbaum, \u201cDistributed protection for high-speed wireline receivers,\u201d in Proc. 45th EOS\/ESD Symp., 2023.<\/p>\n<p> [6]  S. Huang, S. Parthasarathy, Y. Zhou, J.-J. Hajjar, and E. Rosenbaum, \u201cOptimization of SCR for High-Speed Digital and RF Applications in 45-nm SOI CMOS Technology,\u201d in Proc. IRPS, 2023.<\/p>\n<p> [7]  S. Huang, S. Parthasarathy, Y. Zhou, J.-J. Hajjar, and E. Rosenbaum, \u201cPoly Bounded Silicon Controlled Rectifier for ESD Protection in FinFET Technology,\u201d in IEDM, 2023.<\/p>\n<p> [8]  S. Huang and E. Rosenbaum, \u201cPhysics-based Compact Model of N-Well ESD Diodes,\u201d in ESD\/EOS Symp., 2023.<\/p>\n<p> [9]  Y. Zhou, D. LaFonteese, and E. Rosenbaum, \u201cCollector engineering of ESD PNP in BCD technologies,\u201d in Proc. IEEE Int. Reliability Physics Symp. (IRPS), 2023.<\/p>\n<p>[10]  S. Huang, S. Parthasarathy, Y. Zhou, J.-J. Hajjar, and E. Rosenbaum, \u201cA high voltage tolerant supply clamp for ESD protection in 45-nm SOI technology,\u201d in Proc. IRPS, 2022.<\/p>\n<p>[11]  S. Huang and E. Rosenbaum, \u201cCompact model of ESD diode suitable for sub-nanosecond switching transients,\u201d in Proc. IRPS, 2021.<\/p>\n<p>[12]  M. Shah, Y. Zhou, D. LaFonteese, and E. Rosenbaum, \u201cConsiderations in high voltage lateral ESD PNP design,\u201d in Proc. IRPS, 2021.<\/p>\n<p>[13]  M. Shah, Y. Zhou, D. LaFonteese, and E. Rosenbaum, \u201cConsiderations in high voltage lateral esd pnp design,\u201d in 2021 IEEE International Reliability Physics Symposium (IRPS), 2021, pp. 1\u201310. DOI: 10.1109\/IRPS46558.2021.9405093.<\/p>\n<p>[14]  A. Ayling, S. Huang, and E. Rosenbaum, \u201cSub-nanosecond reverse recovery measurement for ESD devices,\u201d in Proc. IRPS, 2020.<\/p>\n<p>[15]  G. Notermans, \u201cHow to Correctly Perform System Level ESD Testing of High-Speed Interface Boards,\u201d May 2018, Feature article in In Compliance Magazine.<\/p>\n<p>[16]  M. Keel and E. Rosenbaum, \u201cESD Self-Protection of High-Speed Transceivers Using Adaptive Active Bias Conditioning,\u201d IEEE Transactions on Device and Materials Reliability, vol. 17, no. 1, pp. 113\u2013120, Mar. 2017. DOI: 10.1109\/TDMR.2016.2628839.<\/p>\n<p>[17]  J. Kuzmik et al., \u201cCurrent conduction mechanism and electrical break-down in InN grown on GaN,\u201d Applied Physics Letters, vol. 110, no. 23, p. 232 103, 2017. DOI: 10.1063\/1.4985128.<\/p>\n<p>[18]  N. A. Thomson, Y. Xiu, and E. Rosenbaum, \u201cSoft-Failures Induced by System-Level ESD,\u201d IEEE Transactions on Device and Materials Reliability, vol. 17, no. 1, pp. 90\u201398, Mar. 2017. DOI: 10.1109\/TDMR.2017.2667712.<\/p>\n<p>[19]  M. Keel and E. Rosenbaum, \u201cCDM-Reliable T-Coil Techniques for a 25-Gb\/s Wireline Receiver Front-End,\u201d IEEE Transactions on Device and Materials Reliability, vol. 16, no. 4, pp. 513\u2013520, Dec. 2016. DOI: 10.1109\/TDMR.2016.2594281.<\/p>\n<p>[20]  K. Meng, Z. Chen, and E. Rosenbaum, \u201cCompact distributed multi-finger MOSFET model for circuit-level ESD simulation,\u201d Microelectronics Reliability, vol. 63, pp. 11\u201321, Aug. 1, 2016. DOI: 10.1016\/j.microrel.2015.12.010.<\/p>\n<p>[21]  R. Mertens and E. Rosenbaum, \u201cPhysical Basis for CMOS SCR Compact Models,\u201d IEEE Transactions on Electron Devices, vol. 63, no. 1, pp. 296\u2013302, Jan. 2016. DOI: 10.1109\/TED.2015.2502951.<\/p>\n<p>[22]  S. Selmo et al., \u201cLow power phase change memory switching of ultra-thin In3Sb1Te2 nanowires,\u201d Applied Physics Letters, vol. 109, no. 21, p. 213 103, 2016. DOI: 10.1063\/1.4968510.<\/p>\n<p>[23]  Z. Chen, R. Mertens, C. Reiman, and E. Rosenbaum, \u201cImproved GGSCR layout for overshoot reduction,\u201d in 2015 IEEE International Reliability Physics Symposium, Apr. 2015, 3F.2.1\u20133F.2.8. DOI: 10.1109\/IRPS.2015.7112720.<\/p>\n<p>[24]  M.-S. Keel and E. Rosenbaum, \u201cCdm-reliable t-coil techniques for high-speed wireline receivers,\u201d in 2015 37th Electrical Overstress\/Electrostatic Discharge Symposium (EOS\/ESD), 2015, pp. 1\u201310. DOI: 10.1109\/EOSESD.2015.7314784.<\/p>\n<p>[25]  K. Meng, R. Mertens, and E. Rosenbaum, \u201cPiecewise-Linear Model With Transient Relaxation for Circuit-Level ESD Simulation,\u201d IEEE Transactions on Device and Materials Reliability, vol. 15, no. 3, pp. 464\u2013466, Sep. 2015. DOI: 10.1109\/TDMR.2015.2466436.<\/p>\n<p>[26]  R. Mertens, N. Thomson, Y. Xiu, and E. Rosenbaum, \u201cAnalysis of Active-Clamp Response to Power-On ESD: Power Supply Integrity and Performance Tradeoffs,\u201d IEEE Transactions on Device and Materials Reliability, vol. 15, no. 3, pp. 263\u2013271, Sep. 2015. DOI: 10.1109\/TDMR.2015.2464222.<\/p>\n<p>[27]  R. Mertens, N. XiuThomson, Y. Xiu, and E. Rosenbaum, \u201cOn-Chip Power Supply Integrity During Power-On ESD,\u201d IEEE Trans. Materials Device Rel., vol. 15, no. 3, pp. 263\u2013271, 2015.<\/p>\n<p>[28]  C. Reiman, N. Thomson, Y. Xiu, R. Mertens, and E. Rosenbaum, \u201cPractical methodology for the extraction of SEED models,\u201d in 2015 37th Electrical Overstress\/Electrostatic Discharge Symposium (EOS\/ESD), Sep. 2015. DOI: 10.1109\/EOSESD.2015.7314789.<\/p>\n<p>[29]  R. Mertens, N. Thomson, Y. Xiu, and E. Rosenbaum, \u201cTheory of active clamp response to power-on ESD and implications for power supply integrity,\u201d in Electrical Overstress\/Electrostatic Discharge Symposium Proceedings 2014, Sep. 2014.<\/p>\n<p>[30]  N. Thomson, Y. Xiu, R. Mertens, M. Keel, and E. Rosenbaum, \u201cCustom test chip for system-level ESD investigations,\u201d in Electrical Overstress\/Electrostatic Discharge Symposium Proceedings 2014, Sep. 2014.<\/p>\n<p>[31]  Yang Xiu, N. Thomson, R. Mertens, and E. Rosenbaum, \u201cA mechanism for logic upset induced by power-on ESD,\u201d in Electrical Overstress\/Electrostatic Discharge Symposium Proceedings 2014, Sep. 2014.<\/p>\n<p>[32]  N. Jack and E. Rosenbaum, \u201cComparison of FICDM and Wafer-Level CDM Test Methods,\u201d IEEE Transactions on Device and Materials Reliability, vol. 13, no. 2, pp. 379\u2013387, Jun. 2013. DOI: 10.1109\/TDMR.2013.2262606.<\/p>\n<p>[33]  K. Meng and E. Rosenbaum, \u201cLayout-aware, distributed, compact model for multi-finger MOSFETs operating under ESD conditions,\u201d in 2013 35th Electrical Overstress\/Electrostatic Discharge Symposium, Sep. 2013, pp. 97\u2013104.<\/p>\n<p>[34]  R. Mertens and E. Rosenbaum, \u201cA physics-based compact model for SCR devices used in ESD protection circuits,\u201d in 2013 IEEE International Reliability Physics Symposium (IRPS), Apr. 2013, 2B.2.1\u20132B.2.7. DOI: 10.1109\/IRPS.2013.6531947.<\/p>\n<p>[35]  R. Mertens and E. Rosenbaum, \u201cSeparating SCR and trigger circuit related overshoot in SCR-based ESD protection circuits,\u201d in 2013 35th Electrical Overstress\/Electrostatic Discharge Symposium, Sep. 2013, pp. 125\u2013132.<\/p>\n<p>[36]  N. Jack and E. Rosenbaum, \u201cComparing FICDM and wafer-level CDM test methods: Apples to Oranges?\u201d In Electrical Overstress \/ Electrostatic Discharge Symposium Proceedings 2012, Sep. 2012, pp. 231\u2013239.<\/p>\n<p>[37]  W. Simb\u00fcrger, D. Johnsson, and M. Stecher, \u201cHigh Current TLP Characterisation: An Effective Tool for the Development of Semiconductor Devices and ESD Protection Solutions,\u201d in ARMMS RF &#038; Microwave Society, Nov. 2012.<\/p>\n<p>Release: December 6, 2024<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Company Profile High Power Pulse Instruments GmbH (HPPI) is a supplier of ESD measurement equipment based on advanced Transmission Line Pulse (TLP) techniques. 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